ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 201

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
Idle character
When an idle frame is detected, there is the same procedure as a data received character
plus an interrupt if the ILIE bit is set and the I bit is cleared in the CCR register.
Overrun error
An overrun error occurs when a character is received when RDRF has not been reset. Data
cannot be transferred from the shift register to the RDR register until the RDRF bit is
cleared.
When a overrun error occurs:
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The OR bit is reset by an access to the SCISR register followed by a SCIDR register read
operation.
Noise error
Oversampling techniques are used for data recovery by discriminating between valid
incoming data and noise.
When noise is detected in a frame:
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The NF bit is reset by a SCISR register read operation followed by a SCIDR register read
operation.
Framing error
A framing error is detected when:
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When the framing error is detected:
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The FE bit is reset by a SCISR register read operation followed by a SCIDR register read
operation.
The OR bit is set.
The RDR content is not lost.
The shift register is overwritten.
An interrupt is generated if the RIE bit is set and the I bit is cleared in the CCR register.
The NF is set at the rising edge of the RDRF bit.
Data is transferred from the shift register to the SCIDR register.
No interrupt is generated. However this bit rises at the same time as the RDRF bit
which itself generates an interrupt.
The stop bit is not recognized on reception at the expected time, following either a de-
synchronization or excessive noise.
A break is received.
the FE bit is set by hardware
Data is transferred from the shift register to the SCIDR register.
No interrupt is generated. However this bit rises at the same time as the RDRF bit
which itself generates an interrupt.
Doc ID 12370 Rev 8
LINSCI serial communication interface (LIN master only)
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