ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 47

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
5.6.3
5.6.4
If t
●
●
Figure 16. Using the AVD to monitor V
Low power modes
Table 9.
Interrupts
The AVD interrupt event generates an interrupt if the AVDIE bit is set and the interrupt mask
in the CC register is reset (RIM instruction).
Table 10.
WAIT
HALT
AVD event
rv
is greater than 256 or 4096 cycles then:
AVDF bit
AVD INTERRUPT
REQUEST
IF AVDIE bit = 1
If the AVD interrupt is enabled before the V
interrupts will be received: The first when the AVDIE bit is set and the second when the
threshold is reached.
If the AVD interrupt is enabled after the V
AVD interrupt occurs.
LVD RESET
Mode
V
V
V
V
IT+(AVD)
IT+(LVD)
IT-(LVD)
IT-(AVD)
Interrupt event
Effect of low power modes on SI
Interrupt control/wake-up capability
V
DD
No effect on SI. AVD interrupts cause the device to exit from Wait mode.
The SICSR register is frozen.
0
1
Doc ID 12370 Rev 8
INTERRUPT PROCESS
V
Early Warning Interrupt
(Power has dropped, MCU not
not yet in reset)
hyst
Event
AVDF
RESET VALUE
flag
DD
IT+(AVD)
IT+(AVD)
Description
Supply, reset and clock management
control
Enable
AVDIE
threshold is reached, then only one
bit
threshold is reached, then two AVD
t
1
rv
VOLTAGE RISE TIME
from
wait
Exit
Yes
INTERRUPT PROCESS
0
from
Exit
halt
No
47/324