ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 142

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

8-bit timer (TIM8)
Note:
13.7.4
13.7.5
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Reading or writing the ACTR register does not clear TOF.
Bit 4 = ICF2 Input Capture Flag 2.
Bit 3 = OCF2 Output Compare Flag 2.
Bit 2 = TIMD Timer disable.
This bit is set and cleared by software. When set, it freezes the timer prescaler and counter
and disabled the output functions (OCMP1 and OCMP2 pins) to reduce power consumption.
Access to the timer registers is still available, allowing the timer configuration to be changed,
or the counter reset, while it is disabled.
Bits 1:0 = Reserved, must be kept cleared.
Input capture 1 register (IC1R)
Read only
Reset value: Undefined
This is an 8-bit read only register that contains the counter value (transferred by the input
capture 1 event).
Output compare 1 register (OC1R)
Read/write
Reset value: 0000 0000 (00h)
This is an 8-bit register that contains the value to be compared to the CTR register.
MSB
MSB
0: no input capture (reset value).
1: an input capture has occurred on the ICAP2 pin. To clear this bit, first read the SR
register, then read or write the IC2R register.
0: no match (reset value).
1: the content of the free running counter has matched the content of the OC2R
register. To clear this bit, first read the SR register, then read or write the OC2R
register.
0: Timer enabled
1: Timer prescaler, counter and outputs disabled
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Doc ID 12370 Rev 8
ST72561-Auto
LSB
LSB
0
0