TMP86xy12MG Toshiba, TMP86xy12MG Datasheet - Page 19
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TMP86xy12MG
Manufacturer Part Number
TMP86xy12MG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY12MG.pdf
(183 pages)
Specifications of TMP86xy12MG
Package
SSOP30
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
16
Ram Size
512
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
-
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
8
Da Converter Channels
-
Timer Counter 18-bit Channel
IGBT
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
24
Power Supply (v)
4.5 to 5.5
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2.2 System Clock Controller
Example :Clears RAM to “00H”. (TMP86CH12MG)
2.2 System Clock Controller
2.1.3 Data Memory (RAM)
2.2.1 Clock Generator
The system clock controller consists of a clock generator, a timing generator, and a standby controller.
(0040H to 00FFH) of the internal RAM are located in the direct area; instructions with shorten operations are
available against such an area.
should be initialized by an initialization routine.
and peripheral hardware. It contains two oscillation circuits: One for the high-frequency clock and one for the
low-frequency clock. Power consumption can be reduced by switching of the standby controller to low-power
operation based on the low-frequency clock.
between the XIN/XOUT and XTIN/XTOUT pins respectively. Clock input from an external oscillator is also
possible. In this case, external clock is applied to XIN/XTIN pin with XOUT/XTOUT pin not connected.
The TMP86CH12MG has 512bytes (Address 0040H to 023FH) of internal RAM. The first 192 bytes
The data memory contents become unstable when the power supply is turned on; therefore, the data memory
The clock generator generates the basic clock which provides the system clocks supplied to the CPU core
The high-frequency (fc) clock and low-frequency (fs) clock can easily be obtained by connecting a resonator
SRAMCLR:
XTOUT
XOUT
XTIN
XIN
LD
LD
LD
LD
INC
DEC
JRS
High-frequency
clock oscillator
Low-frequency
clock oscillator
generator
Clock
Figure 2-2 System Colck Control
HL, 0040H
A, H
BC, 01FFH
(HL), A
HL
BC
F, SRAMCLR
fc
fs
Timing generator control register
Clock generator control
Page 8
System clocks
; Start address setup
; Initial value (00H) setup
generator
TBTCR
Timing
0036 H
0038 H
System control registers
SYSCR1
Standby controller
0039 H
TMP86CH12MG
SYSCR2
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