N25Q128 Numonyx, N25Q128 Datasheet - Page 106

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N25Q128

Manufacturer Part Number
N25Q128
Description
128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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0
9.1.26
9.1.27
106/180
S
C
DQ0
DQ1
Table 21.
1. Values of (b1, b0) after power-up are defined in
Read Flag Status Register
The Read Flag Status Register (RFSR) instruction allows the Flag Status Register to be
read. The Status Register may be read at any time, even while a Program, Erase. When one
of these cycles is in progress, it is recommended to check the P/E Controller bit (Not WIP)
bit before sending a new instruction to the device. It is also possible to read the Flag
Register continuously, as shown here.
Figure 34. Read Flag Status Register instruction sequence
Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
All sectors
0
High Impedance
1
2
Sector
Instruction
3
Lock Register in
4
5
6
7
b7-b2
Bit
b1
b0
7
8
(1)
Flag Status Register Out
6
9 10 11 12 13 14 15
Sector Lock Down bit value (refer to
Sector Write Lock bit value (refer to
5
MSB
4
Section 7: Protection
3
2
1
0
7
Flag Status Register Out
modes.
6
Value
‘0’
5
MSB
4
Table
Table
3
20)
20)
2
1
0
Read_Flag_SR
7

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