N25Q128 Numonyx, N25Q128 Datasheet - Page 123

• Manufacturer Part Number: N25Q128
• Description: 128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

9.2.15
9.2.16
DQ0
DQ1
C
S
Read Lock Register (RDLR)
The Read Lock Register instructions is used to read the lock register content.
Apart form the parallelizing of the instruction code, the address and the output data on the
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Read Lock
Register (RDLR) instruction of the Extended SPI protocol, please refer to
Read Lock Register (RDLR)
Figure 58. Read Lock Register instruction and data-out sequence DIO-SPI
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed.
Apart form the parallelizing of the instruction code, the address and the input data on the
two pins DQ0 and DQ1, the instruction functionality is exactly the same as the Write to Lock
Register (WRLR) instruction of the Extended SPI protocol, please refer to
Write to Lock Register (WRLR)
0
Instruction
1
2
3
23 21 19 17
22 20 18 16
4
5
for further details.
6
for further details.
7
24-Bit Address
15 13 11 9
14 12 10 8
8
9 10 11
12 13 14 15
7
6
5
4
3
2
1
0
12 13 14 15
Lock Register Out
7
6
5
4
Section 9.1.24:
Section 9.1.25:
3
2
1
0
Dual_Read_LR
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