N25Q128 Numonyx, N25Q128 Datasheet - Page 170

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N25Q128

Manufacturer Part Number
N25Q128
Description
128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet

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0
Table 33.
1. All values are guaranteed by characterization and not 100% tested in production.
2. The device reset is possible but not guaranteed if tRLRH < 50 ns.
170/180
tRLRH
tRHSL
tSHRV
Symbol
(1)
(1)(2)
(1)
Reset Conditions
tRST
tREC
Figure 103. Serial input timing
Alt.
S
C
DQ0
DQ1
Reset pulse width
Reset Recovery
Time
S# deselect to R
valid
tCHSL
Parameter
tDVCH
High Impedance
MSB IN
Device selected (S low), while decoding
any modify instruction, during all read
operations, CLFSR, WRDI, WREN,
WRLR, WRVCR, WRVECR.
Under completion of an internal erase or
program cycle related to POTP, PP, DIEFP,
DIFP, QIEFP, QIFP, SE, BE, PER, PES.
Under completion of an SSE operation.
Under completion of an WRSR operation.
Under completion of an WRNVCR
operation.
Under completion of the first WREN issued
when Fast POR selected.
Device deselected (S high) and in XiP
mode.
Device deselected (S high) and in Standby
mode.
Deselect to R valid in Quad Output or in
QIO-SPI.
tSLCH
tCHDX
Conditions
tCLCH
tCHSH
LSB IN
50
40
30
40
40
2
Min
tCHCL
tSHSL
t
t
t
t
SSE
W
WNVCR
DTW
Typ
tSHCH
Max Unit
AI13728
ns
ns
µs
ms
ms
ms
µs
ns
ns
ns

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