N25Q128 Numonyx, N25Q128 Datasheet - Page 33
N25Q128
Manufacturer Part Number
N25Q128
Description
128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
Manufacturer
Numonyx
Datasheet
1.N25Q128.pdf
(180 pages)
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Figure 8.
A Flag Status Register (FSR), 8 bits, is also available to check the status of the device,
detecting possible errors or a Program/Erase internal cycle in progress.
Each register can be read and modified by means of dedicated instructions in all the 3
protocols (Extended SPI, DIO-SPI, and QIO-SPI).
Reading time for all registers is comparable; writing time instead is very different: NVCR bits
are set as Flash Cell memory content requiring a longer time to perform internal writing
cycles. See
Register download executed only
during the power on phase
(Non Volatile Configuratio n Register)
Table 32.: AC
Non Volatile and Volatile configuration Register Scheme
NVCR
Characteristics.
(internal Configuration Register)
Device behaviour
iCR
VCR
Co nfiguratio n Register)
and VECR
Registers download executed after
a WRVCR or WRVECR
instructions, it overwrites NVCR
configurations on iCR
(Volatile Co nfiguratio n Register)
(Volatile Enhanced
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