N25Q128 Numonyx, N25Q128 Datasheet - Page 148

• Manufacturer Part Number: N25Q128
• Description: 128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

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DQ0
DQ3
DQ1
DQ2
S
C
Figure 88. Read Flag Status Register instruction sequence QIO-SPI
Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
Mode 3
Mode 0
Instruction
0
1
5
4
6
7
2
1
0
2
3
3
5
4
6
7
4
1
0
2
3
5
5
4
6
7
6
1
0
2
3
7
Flag Status Register Out
5
4
6
7
8
1
0
3
9 10
2
5
4
7
6
11 12 13 14 15
1
0
3
2
4
5
7
6
0
1
3
2
4
5
7
6
Quad_Read_Flag_SR
0
1
3
2