N25Q128 Numonyx, N25Q128 Datasheet - Page 113

• Manufacturer Part Number: N25Q128
• Description: 128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

Table 22.
9.2.1
Instruction
WRNVCR
RFSR
CLFSR
RDNVCR
RDVCR
WRVCR
RDVECR
WRVECR
Clear Flag Status Register
Read NV Configuration Register
Read Volatile Configuration Register
Write Volatile Configuration Register
Read Volatile Enhanced Configuration
Register
Register
Instruction set: DIO-SPI protocol (page 2 of 2)
1)
2)
Multiple I/O Read Identification protocol
The Multiple Input/Output Read Identification (MIORDID) instruction allows to read the
device identification data in the DIO-SPI protocol:
Unlike the RDID instruction of the Extended SPI protocol, the Multiple Input/Output
instruction can not read the Unique ID code (UID) (17 bytes).
For further details on the manufacturer and device identification codes please refer to
Section 9.1.1: Read Identification
Any Multiple Input/Output Read Identification (MIORDID) instruction while an Erase or
Program cycle is in progress, is not decoded, and has no effect on the cycle that is in
progress.
The device is first selected by driving Chip Select (S) Low. Then, the 8-bit instruction code
for the instruction is shifted in parallel on the 2 pins DQ0 and DQ1. After this, the 24-bit
device identification, stored in the memory, will be shifted out on again in parallel on DQ1
and DQ0. Each two bits are shifted out during the falling edge of Serial Clock (C).
The Read Identification (RDID) instruction is terminated by driving Chip Select (S) High at
any time during data output.
When Chip Select (S) is driven High, the device is put in the Standby Power mode. Once in
the Standby Power mode, the device waits to be selected, so that it can receive, decode and
execute instructions.
Read Flag Status Register
Write NV Configuration Register
Write Volatile Enhanced Configuration
The number of Dummy Clock cycles is configurable by the user
SSE is only available in devices with Bottom or Top architecture.
–
–
Manufacturer identification (1 byte)
Device identification (2 bytes)
Description
(RDID).
1011 0101
0110 0101
0111 0000
0101 0000
1011 0001
1000 0101
1000 0001
0110 0001
Instruction
Code (BIN)
One-byte
B5h
Instruction
70h
50h
B1h
85h
81h
65h
61h
One-byte
(HEX)
Code
0
Address
0
0
0
0
0
0
0
bytes
0
0
0
Dummy
0
0
0
0
0
clock
cycle
2
2
1
1
1 to
0
1 to
1 to
113/180
bytes
Data
∞
∞
∞