N25Q128 Numonyx, N25Q128 Datasheet - Page 161

• Manufacturer Part Number: N25Q128
• Description: 128-mbit 3 V, Multiple I/o, 4-kbyte Subsector Erase On Boot Sectors, Xip Enabled, Serial Flash Memory With 108 Mhz Spi Bus Interface
• Manufacturer: Numonyx

N25Q128 - 3 V
XIP Operations
10.4
XIP Memory reset after a controller reset
If during the application life the system controller is reset during operation, and the device
features the RESET functionality (in devices with a dedicated part number), and the feature
has not been disabled, after the controller resets, the memory returns to POR state and
there is no issue. See
Section 16: Ordering
information.
In all the other cases, it is possible to exit the memory from the XIP mode by sending the
following rescue sequence at the first chip selection after a system reset:
DQ0= '1' for:
7 clock cycles within S low (S becomes high before 8th clock cycle)
+ 13 clock cycles within S low (S becomes high before 14th clock cycle)
+ 25 clock cycles within S low (S becomes high before 26th clock cycle)
The global effect is only to exit from XIP without any other reset.
161/180