P60ARM-B/IG/GP1Q Zarlink Semiconductor, Inc., P60ARM-B/IG/GP1Q Datasheet - Page 64
P60ARM-B/IG/GP1Q
Manufacturer Part Number
P60ARM-B/IG/GP1Q
Description
Microprocessor, 32-Bit Data Bus, 30MHz Processor, 100-QFP
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.P60ARM-BIGGP1Q.pdf
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P60ARM-B
4.14 UndeÞned instruction
The instruction is only executed if the condition is true. The various conditions are defined at the beginning
of this chapter. The instruction format is shown in Figure 28: Undefined Instruction.
If the condition is true, the undefined instruction trap will be taken.
31
28
27
25
24
5 4 3
0
Cond
011
xxxxxxxxxxxxxxxxxxxx
1
xxxx
Figure 28: Undefined Instruction
Note that the undefined instruction mechanism involves offering this instruction to any coprocessors which
may be present, and all coprocessors must refuse to accept it by driving CPA and CPB HIGH. For systems
without a coprocessor, CPA and CPB must be driven HIGH at all times.
4.14.1 Assembler syntax
At present the assembler has no mnemonics for generating this instruction. If it is adopted in the future for
some specified use, suitable mnemonics will be added to the assembler. Until such time, this instruction
shall not be used.
60
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