P60ARM-B/IG/GP1Q Zarlink Semiconductor, Inc., P60ARM-B/IG/GP1Q Datasheet - Page 77

• Manufacturer Part Number: P60ARM-B/IG/GP1Q
• Description: Microprocessor, 32-Bit Data Bus, 30MHz Processor, 100-QFP
• Manufacturer: Zarlink Semiconductor, Inc.

Coprocessor Interface
where it goes not-busy. The coprocessor must therefore preserve the original floating point value and not
corrupt it during the conversion, because it will be required again if an interrupt arises during the busy
period.
The coprocessor data operation class of instruction is not generally subject to idempotency considerations,
as the processing activity can take place after the coprocessor goes not-busy. There is no need for ARM60
to be held up until the result is generated, because the result is confined to stay within the coprocessor.
6.6 UndeÞned instructions
Undefined instructions are treated by ARM60 as coprocessor instructions. All coprocessors must be absent
(ie CPA and CPB must be HIGH) when an undefined instruction is presented. ARM60 will then take the
undefined instruction trap. Note that the coprocessor need only look at bit 27 of the instruction to
differentiate undefined instructions (which all have 0 in bit 27) from coprocessor instructions (which all
have 1 in bit 27).
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