HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 14

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

863 C ]Y^Y
3.2.1 FIFO channel operation
Figure 3: FIFO Organisation
*
FIFO change, FIFO reset and F1/F2 incrementation
Changing the FIFO, reseting the FIFO or incrementing the frame counters causes a short BUSY
period of the HFC-S mini. This means an access to FIFO control registers is NOT allowed until
BUSY status is reset (bit 0 of STATUS register). This has a maximum duration of 25 clock cycles
(2µs). Status, interrupt and control registers can be read and written at any time.
*
The counter state 00h of the Z-counters follows counter state 7Fh in the B-, D- and PCM FIFOs.
The counter state 00h of the F-counters follows counter state 07h in the B-, D- and PCM FIFOs.
important!
important!
Cologne
Chip