HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 55

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HFC-Smini

Manufacturer Part Number
HFC-Smini
Description
Manufacturer
Cologne Chip AG
Datasheet
863C ]Y^Y
6.1.6 Register write access in multiplexed mode (mode 4)
Timing diagram 6: Register write access in multiplexed mode (mode 4)
t
CLKI
SYMBOL
t
t
t
t
t
t
t
t
WR
WRDSU
WRDH
SA
SAH
ALS
AA
CYCLE
*
A0 must be '0' during the whole register write cycle.
is the CLKI clock period.
important!
Write Time
Write Data Setup Time to /WR High
Write Data Hold Time from /WR High
Address to ALE Low Setup Time
Address Hold Time after ALE Low
ALE Low to /WR Low Setup Time
ALE Active Time
Read/Write Cycle
CHARACTERISTICS
6 x t
MIN.
50ns
30ns
10ns
20ns
20ns
30ns
10ns
CLKI
Cologne
Chip
MAX.

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