HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 54

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

863 C ]Y^Y
6.1.5 Register read access in multiplexed mode (mode 4)
Timing diagram 5: Register read access in multiplexed mode (mode 4)
t
CLKI
SYMBOL
t
t
t
t
t
t
t
t
RD
RDD
RDDH
SA
SAH
ALS
AA
CYCLE
*
A0 must be '0' during the whole register read cycle.
is the CLKI clock period.
important!
Read Time
/RD Low to Read Data Out Time
/RD High to Data Buffer Turn Off Time
Address to ALE Low Setup Time
Address Hold Time after ALE Low
ALE Low to /RD Low Setup Time
ALE Active Time
Read/Write Cycle
CHARACTERISTICS
6 x t
MIN.
50ns
20ns
20ns
30ns
10ns
3ns
2ns
CLKI
Cologne
Chip
MAX.
25ns
15ns
–
–
–