HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 33

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

863 C ]Y^Y
Name
F_FILL
INT_S1
*
The interrupts indicated in the INT_S1 register are frame interrupts which occur in HDLC mode.
In transparent mode an interrupt can be generated on a regular basis. Interrupt frequency can be
selected in the CON_HDLC register.
note!
Addr.
1Bh '0'
10h
'1'
Bits
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Number of bytes in the following FIFOs is lower than the value defined
in the F_THRES register.
Number of bytes in the following FIFOs is greater or equal than the
value defined in the F_THRES register.
r/w Function
r
r
r
r
r
r
r
r
r
r
r
r
r
r
r
r
B1-transmit
B1-receive
B2-transmit
B2-receive
D-transmit
D-receive
PCM-transmit
PCM-receive
'1'
B1-channel interrupt status in receive direction
'1'
B2-channel interrupt status in transmit direction
'1'
B2-channel interrupt status in receive direction
'1'
D-channel interrupt status in transmit direction
'1'
D-channel interrupt status in receive direction
'1'
PCM-channel interrupt status in transmit direction
'1'
PCM-channel interrupt status in receive direction
'1'
B1-channel interrupt status in transmit direction
a complete frame has been transmitted, the frame counter
F2 has been incremented
a complete frame has been transmitted, the frame counter
F1 has been incremented
a complete frame has been transmitted, the frame counter
F2 has been incremented
a complete frame has been transmitted, the frame counter
F1 has been incremented
a complete frame was transmitted, the frame counter
F2 was incremented
a complete frame was transmitted, the frame counter
F1 was incremented
a complete frame was transmitted, the frame counter
F2 was incremented
a complete frame was transmitted, the frame counter
F1 was incremented
Cologne
Chip