MT57V1MH18A Micron Semiconductor Products, Inc., MT57V1MH18A Datasheet - Page 9

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MT57V1MH18A

Manufacturer Part Number
MT57V1MH18A
Description
18Mb DDR SRAM, 2.5V Vdd, Hstl, 2-Word Burst,
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet

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Table 5:
NOTE:
18Mb: 2.5V V
MT57V1MH18A_16_F.fm – Rev. F, Pub. 3/03
1. SA0 is internally advanced in accordance with the burst order table. Bus cycle is terminated after burst count = 2.
2. State transitions: L = (LD# = LOW); L# = (LD# = HIGH); R = (R/W# = HIGH); W = (R/W# = LOW).
3. State machine control timing sequence is controlled by K.
LOAD NEW ADDRESS
DD
, HSTL, Pipelined DDRb2 SRAM
Count = 0
Linear Burst Address
FIRST ADDRESS
(EXTERNAL)
X...X0
X...X1
L, Count = 2
R
W
L, Count = 2
Bus Cycle State Diagram
Count = Count + 2
Count = Count + 2
2.5V V
WRITE DOUBLE
READ DOUBLE
Figure 4:
L
9
DD
, HSTL, PIPELINED DDRb2 SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
L#, Count = 2
L#, Count = 2
SECOND ADDRESS
1 MEG x 18, 512 x 36
(INTERNAL)
X...X1
X...X0
POWER-UP
NOP
provided
voltage
Supply
©2003 Micron Technology Inc.
L#

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