XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 59

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

Virtex-II Pro Performance Characteristics
This section provides the performance characteristics of
some common functions and designs implemented in
Virtex-II Pro devices. The numbers reported here are fully
characterized worst-case values. Note that these values are
subject to the same guidelines as
Characteristics, page 61
Table 11: Pin-to-Pin Performance
Table 12
Table 12: Register-to-Register Performance
DS083-3 (v1.0) January 31, 2002
Advance Product Specification
Basic Functions:
Memory:
Block RAM
Distributed RAM
Basic Functions:
16-bit Address Decoder
32-bit Address Decoder
64-bit Address Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
Combinatorial (pad to LUT to pad)
Pad to setup
Clock to Pad
Pad to setup
Clock to Pad
16-bit Address Decoder
32-bit Address Decoder
64-bit Address Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
Register to LUT to Register
8-bit Adder
16-bit Adder
shows internal (register-to-register) performance. Values are reported in MHz.
R
Description
Description
(speed files).
Virtex-II Pro Switching
Register-to-Register Performance
Virtex-II Pro™ Platform FPGAs: DC and Switching Characteristics
www.xilinx.com
1-800-255-7778
Pin-to-Pin (w/ I/O delays)
Table 11
including IOB delays; that is, delay through the device from
input pin to output pin. In the case of multiple inputs and out-
puts, the worst delay is reported.
provides pin-to-pin values (in nanoseconds)
Device Used & Speed Grade
Device Used & Speed Grade
59