XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 73

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

Table 28: IOB Output Switching Characteristics (Continued)
IOB Output Switching Characteristics Standard Adjustments
Output delays terminating at a pad are specified for LVCMOS25 with 12 mA drive and fast slew rate. For other standards,
adjust the delays by the values shown.
Table 29: IOB Output Switching Characteristics Standard Adjustments
DS083-3 (v1.0) January 31, 2002
Advance Product Specification
Notes:
1.
2.
Setup and Hold Times Before/After Clock CLK
Set/Reset Delays
Output Delay Adjustments
O input
OCE input
SR input (OFF)
3-State Setup Times, T input
3-State Setup Times, TCE input
3-State Setup Times, SR input (TFF)
SR input to Pad (asynchronous)
SR input to Pad high-impedance
(asynchronous)
SR input to valid data on Pad
(asynchronous)
GSR to Pad
Standard-specific adjustments for
output delays terminating at pads
(based on standard capacitive
load, Csl)
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
if a “0” is listed, there is no positive hold time.
The 3-state turn-off delays should not be adjusted.
R
Description
(2)
Description
T
T
T
T
T
T
T
T
T
T
T
T
OLVTTL_S12
OLVTTL_S16
OLVTTL_S24
OLVTTL_F12
OLVTTL_S2
OLVTTL_S4
OLVTTL_S6
OLVTTL_S8
OLVTTL_F2
OLVTTL_F4
OLVTTL_F6
OLVTTL_F8
Symbol
Virtex-II Pro™ Platform FPGAs: DC and Switching Characteristics
www.xilinx.com
1-800-255-7778
T
T
T
T
IOOCECK
IOSRCKO
IOSRCKT
IOTCECK
T
T
IOOCK
IOTCK
T
T
Symbol
T
T
IOGSRQ
IOSRON
IOSRHZ
IOSRP
LVTTL, Slow, 2 mA
LVTTL, Fast, 2 mA
/T
/T
/T
/T
/T
/T
IOCKO
IOCKOCE
IOCKOSR
IOCKT
IOCKTCE
IOCKTSR
Standard
12 mA
16 mA
24 mA
12 mA
4 mA
6 mA
8 mA
4 mA
6 mA
8 mA
–8
Speed Grade
–8
–
Speed Grade
7
–
7
–
6
–
6
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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