TS68EN360MAB Atmel Corporation, TS68EN360MAB Datasheet - Page 2

• Manufacturer Part Number: TS68EN360MAB
• Description: 32-bit Communication Controller, 25 or 33 MHz
• Manufacturer: Atmel Corporation

1. Introduction
1.1
2
QUICC Architecture Overview
TS68EN360
The QUICC is 32-bit controller that is an extension of other members of the TS68300 family.
Like other members of the TS68300 family, the QUICC incorporates the intermodule bus (IMB).
The TS68302 is an exception, having an 68000 bus on chip. The IMB provides a common inter-
face for all modules of the TS68300 family, which allows the development of new devices more
quickly by using the library of existing modules. Although the IMB definition always included an
option for an on-chip 32-bit bus, the QUICC is the first device to implement this option.
The QUICC is comprised of three modules: the CPU32+ core, the SIM60, and the CPM. Each
module utilizes the 32-bit IMB. The TS68EN360 QUICC block diagram is shown in
Figure 1-1.
Ceramic Pin Grid Array Cavity Up
QUICC Block Diagram
PGA 241
R suffix
IDMAs
TWO
CPU32+
CORE
FOURTEEN SERIAL
CHANNELS
CONTROLLER
SERIAL
SEVEN
DMAs
RISC
COMMUNICATIONS PROCESSOR
TIMER SLOT
ASSIGNER
IMB (32 BIT)
CPM
CONTROLLER
DUAL-PORT
INTERRUPT
GENERATION
PROTECTION
2.5-KBYTE
FEATURES
PERIODIC
SYSTEM
CLOCK
OTHER
RAM
TIMER
FEATURES
OTHER
SIM 60
Ceramic Leaded Chip Carrier Cavity Down
CHIP SELECTS
BREAKPOINT
CONTROLLER
INTERFACE
GENERAL-
EXTERNAL
PURPOSE
LOGIC
TIMERS
FOUR
DRAM
JTAG
AND
BUS
CERQUAD 240
A suffix
SYSTEM
I/F
2113B–HIREL–06/05
Figure
1-1.