TS68EN360MAB Atmel Corporation, TS68EN360MAB Datasheet - Page 76

• Manufacturer Part Number: TS68EN360MAB
• Description: 32-bit Communication Controller, 25 or 33 MHz
• Manufacturer: Atmel Corporation

9. Preparation for Delivery
9.1
9.2
10. Handling
76
Packaging
Certificate of Compliance
TS68EN360
Microcircuits are prepared for delivery in accordance with MIL-PRF-38535 or Atmel standards.
Atmel offers a certificate of compliances with each shipment of parts, affirming the products are
in compliance either with MIL-STD-883 or Atmel standard and guarantying the parameters not
tested at temperature extremes for the entire temperature range.
MOS devices must be handled with certain precautions to avoid damage due to accumulation of
static charge. Input protection devices have been designed in the chip to minimize the effect of
this static buildup. However, the following handling practices are recommended:
a) Devices should be handled on benches with conductive and grounded surfaces
b) Ground test equipment, tools and operator
c) Do not handle devices by the leads
d) Store devices in conductive foam or carriers
e) Avoid use of plastic, rubber, or silk in MOS areas
f) Maintain relative humidity above 50% if practical
• The QUICC contains an 8-Kbyte block of memory as opposed to a 4-Kbyte block on the
• The code used to initialize the system integration features of the TS68302 has to be modified
• As much as possible, QUICC CPM features were made identical to those of the TS68302 CP.
• Although the registers used to initialize the QUICC CPM are new (for example, the SCM on
• When porting code from the TS68302 CP to the QUICC CPM, the software writer may find
TS68302. The register addresses within that memory map are different
to write the corresponding features on the QUICC SIM60
The most important benefit is that the code flow (if not the code itself) will port easily from the
TS68302 to the QUICC. The nuances learned from the TS68302 will still be useful in the
QUICC
the TS68302 is replaced with the GSMR and PSMR on the QUICC), most registers retain
their original purpose such as the SCC event, SCC mask, SCC status, and command
registers. The parameter RAM of the SCCs is very similar, and most parameter RAM register
names and usage are retained. More importantly, the basic structure of a buffer descriptor
(BD) on the QUICC is identical to that of the TS68302, except for a few new bit functions that
were added. (In a few cases, a bit in a BD status word had to be shifted)
that the QUICC has new options to simplify what used to be a more code-intensive process.
For specific examples, see the INIT TX AND RX PARAMETERS, GRACEFUL STOP
TRANSMIT, and CLOSE BD commands
2113B–HIREL–06/05