upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 184
upd78f0103hmca1-5a4-a
Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0103HMCA1-5A4-A.pdf
(438 pages)
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10.3 Registers Used in A/D Converter
(1) A/D converter mode register (ADM)
184
The A/D converter uses the following five registers.
• A/D converter mode register (ADM)
• Analog input channel specification register (ADS)
• A/D conversion result register (ADCR)
• Power-fail comparison mode register (PFM)
• Power-fail comparison threshold register (PFT)
This register sets the conversion time for analog input to be A/D converted, and starts/stops conversion.
ADM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Notes 1. Set so that the A/D conversion time is as follows.
Remark f
2. A booster circuit is incorporated to realize low-voltage operation. The operation of the circuit that
generates the reference voltage for boosting is controlled by ADCE, and it takes 14
start to operation stabilization. Therefore, when ADCS is set to 1 after 14
the time ADCE is set to 1, the conversion result at that time has priority over the first conversion result.
X
: High-speed system clock oscillation frequency
• Standard products, (A) grade products: 14
• (A1) grade products: 14
Address: FF28H
Symbol
ADM
Figure 10-3. Format of A/D Converter Mode Register (ADM)
ADCS
ADCS
ADCE
FR2
<7>
0
1
0
0
0
1
1
1
0
1
Other than above
Stops conversion operation
Enables conversion operation
Stops operation of reference voltage generator
Enables operation of reference voltage generator
After reset: 00H
FR1
6
0
0
0
1
0
0
1
Boost reference voltage generator operation control
µ
CHAPTER 10 A/D CONVERTER
s or longer but less than 60
User’s Manual U16846EJ3V0UD
FR2
FR0
5
0
1
0
0
1
0
A/D conversion operation control
288/f
240/f
192/f
144/f
120/f
96/f
Setting prohibited
R/W
FR1
4
X
X
X
X
X
X
µ
Conversion time selection
s or longer but less than 100
f
144 s
120 s
96 s
72 s
60 s
48 s
X
= 2 MHz
FR0
µ
µ
µ
µ
µ
µ
3
f
µ
X
34.3 s
28.6 s
22.9 s
17.2 s
14.3 s
11.5 s
= 8.38 MHz f
s
2
0
µ
µ
µ
µ
µ
µ
X
28.8 s
24.0 s
19.2 s
14.4 s
12.0 s
9.6 s
= 10 MHz
1
0
µ
µ
Note 1
µ
µ
µ
µ
Note 2
f
18 s
15 s
12 s
9 s
7.5 s
6 s
µ
X
ADCE
s or more has elapsed from
= 16 MHz
µ
µ
<0>
µ
µ
µ
µ
µ
s
µ
s from operation
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