upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 330

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upd78f0103hmca1-5a4-a

Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
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20.1 Functions of Option Bytes
the device is restarted from the reset status, the device automatically references the option bytes and sets specified
functions. When using the product, be sure to set the following functions by using the option bytes.
Therefore, set values that are the same as those of 0080H to 0084H to 1080H to 1084H in advance.
20.2 Format of Option Byte
330
Address: 0080H/1080H
0080H/1080H
The flash memory at 0080H to 0084H of the 78K0/KB1+ is an option byte area. When power is turned on or when
When the boot swap operation is used during self-programming, 0080H to 0084H are switched to 1080H to 1084H.
Caution Be sure to set 00H to 0081H, 0082H, 0083H, and 0084H (0081H/1081H, 0082H/1082H, 0083H/1083H,
The format of the option byte is shown below.
Note Set a value that is the same as that of 0080H to 1080H because 0080H and 1080H are switched during the
Cautions 1. If LSROSC = 0 (oscillation can be stopped by software), the count clock is not supplied to the
1. Selection of high-speed system clock oscillation
2. Internal oscillator operation
• Crystal/ceramic oscillator
• External RC oscillator
• Can be stopped by software
• Cannot be stopped
boot swap operation.
and 0084H/1084H when the boot swap function is used).
2. Be sure to clear bit 2 to 7 to 0.
OSCSEL0
LSROSC
watchdog timer in the HALT and STOP modes, regardless of the setting of bit 0 (RSTOP) of
the internal oscillation mode register (RCM).
When 8-bit timer H1 operates with the internal oscillation clock, the count clock is supplied to
8-bit timer H1 even in the HALT/STOP mode.
7
0
0
1
0
1
Note
Crystal/ceramic oscillator
External RC oscillator
Can be stopped by software (stopped when 1 is written to bit 0 (RSTOP) of RCM register)
Cannot be stopped (not stopped even if 1 is written to RSTOP bit)
6
0
Figure 20-1. Format of Option Byte (1/2)
CHAPTER 20 OPTION BYTE
5
0
User’s Manual U16846EJ3V0UD
Selection of high-speed system clock oscillation
4
0
Internal oscillator operation
3
0
2
0
OSCSEL0
1
LSROSC
0

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