upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 298

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

15.2.2 STOP mode
(1) STOP mode setting and operating statuses
Notes 1. When “Stopped by software” is selected for the internal oscillator by the option byte and the internal
298
Item
System clock
CPU
Port (output latch)
16-bit timer/event counter 00
8-bit timer/event counter 50
8-bit timer H0
8-bit timer H1
Watchdog
timer
A/D converter
Serial interface
Clock monitor
Power-on-clear function
Low-voltage detection function
External interrupt
The operating statuses in the STOP mode are shown below.
The STOP mode is set by executing the STOP instruction. It can be set when the CPU clock before the setting
was the high-speed system clock or internal oscillation clock.
Caution Because the interrupt request signal is used to clear the standby mode, if there is an interrupt
2. Operable only when f
3. “Internal oscillator cannot be stopped” or “Internal oscillator can be stopped by software” can be selected
4.
oscillator is stopped by software (for the option byte, see CHAPTER 20 OPTION BYTE).
by the option byte.
µ
PD78F0102H and 78F0103H only.
source with the interrupt request flag set and the interrupt mask flag reset, the standby mode is
immediately cleared if set. Thus, the STOP mode is reset to the HALT mode immediately after
execution of the STOP instruction and the system returns to the operating mode as soon as the
wait time set using the oscillation stabilization time select register (OSTS) has elapsed.
Internal oscillator
cannot be stopped
Internal oscillator can
be stopped
HALT Mode Setting
Note 3
UART0
UART6
CSI10
Note 3
Note 4
R
Table 15-4. Operating Statuses in STOP Mode
/2
7
Only high-speed system clock oscillator oscillation is stopped. Clock supply to the CPU
is stopped.
Operation stopped
Holds the status before STOP mode was set
Operation stopped
Operable only when TI50 is selected as count clock
Operable when TM50 output is selected as count clock during 8-bit timer/event counter
50 operation
Operable
Operable
Operation stopped
Operation stopped
Operable only when TM50 output is selected as count clock during 8-bit timer/event
counter 50 operation
Operable only when external SCK10 is selected as serial clock
Operation stopped
Operable
Operable
Operable
is selected as count clock.
CPU Is Operating Using High-Speed System
When STOP Instruction Is Executed While
Oscillation Clock
When Internal
CHAPTER 15 STANDBY FUNCTION
Continues
Note 2
User’s Manual U16846EJ3V0UD
Clock
Operation stopped
Oscillation Clock
When Internal
Stopped
−
Note 1
Operable
Operable
When STOP Instruction Is Executed
While CPU Is Operating on Internal
Note 2
Oscillation Clock