upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 328

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upd78f0103hmca1-5a4-a

Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
328
Note 1
Notes 1.
2.
3.
If reset is generated again during this period, initialization processing is not started.
A flowchart is shown on the next page.
Waiting for the oscillation stabilization time is not required when the external RC oscillation clock is
selected as the high-speed system clock by the option byte.
switched without reading the OSTC value.
No
Figure 19-6. Example of Software Processing After Release of Reset (1/2)
50 ms has passed?
Change CPU clock
Check stabilization
Checking cause
(TMIFH1 = 1?)
(set to 50 ms)
of oscillation
of reset
Initialization
processing
Start timer
Reset
LVI
Yes
Note 2
CHAPTER 19 LOW-VOLTAGE DETECTOR
User’s Manual U16846EJ3V0UD
; The internal oscillation clock is set as the CPU clock
; The cause of reset (power-on-clear, WDT, LVI, or clock monitor)
; 8-bit timer H1 can operate with the internal oscillation clock.
; Check the stabilization of oscillation of the high-speed system clock
; Change the CPU clock from the internal oscillation clock
; TMIFH1 = 1: Interrupt request is generated.
; Initialization of ports
when the reset signal is generated
can be identified by the RESF register.
Source: f
(f
to the high-speed system clock.
by using the OSTC register
R
: internal oscillation clock frequency)
R
(480 kHz (MAX.))/2
Note 3
Therefore, the CPU clock can be
7
× compare value 200 = 53 ms
.

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