upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 228
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upd78f0103hmca1-5a4-a
Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0103HMCA1-5A4-A.pdf
(438 pages)
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(1) Receive buffer register 6 (RXB6)
(2) Receive shift register 6 (RXS6)
(3) Transmit buffer register 6 (TXB6)
(4) Transmit shift register 6 (TXS6)
228
This 8-bit register stores parallel data converted by receive shift register 6 (RXS6).
Each time 1 byte of data has been received, new receive data is transferred to this register from receive shift
register 6 (RXS6). If the data length is set to 7 bits, data is transferred as follows.
• In LSB-first reception, the receive data is transferred to bits 0 to 6 of RXB6 and the MSB of RXB6 is always 0.
• In MSB-first reception, the receive data is transferred to bits 1 to 7 of RXB6 and the LSB of RXB6 is always 0.
If an overrun error (OVE6) occurs, the receive data is not transferred to RXB6.
RXB6 can be read by an 8-bit memory manipulation instruction. No data can be written to this register.
RESET input sets this register to FFH.
This register converts the serial data input to the R
RXS6 cannot be directly manipulated by a program.
This buffer register is used to set transmit data. Transmission is started when data is written to TXB6.
This register can be read or written by an 8-bit memory manipulation instruction.
RESET input sets this register to FFH.
Cautions 1. Do not write data to TXB6 when bit 1 (TXBF6) of asynchronous serial interface transmission
This register transmits the data transferred from TXB6 from the T
TXB6 immediately after TXB6 is written for the first transmission, or immediately before INTST6 occurs after one
frame was transmitted for continuous transmission. Data is transferred from TXB6 and transmitted from the T
pin at the falling edge of the base clock.
TXS6 cannot be directly manipulated by a program.
2. Do not refresh (write the same value to) TXB6 by software during a communication
status register 6 (ASIF6) is 1.
operation (when bit 7 (POWER6) and bit 6 (TXE6) of asynchronous serial interface operation
mode register 6 (ASIM6) are 1 or when bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 are 1).
CHAPTER 12 SERIAL INTERFACE UART6
User’s Manual U16846EJ3V0UD
X
D6 pin into parallel data.
X
D6 pin as serial data. Data is transferred from
X
D6
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