st20-gp6 STMicroelectronics, st20-gp6 Datasheet - Page 38

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st20-gp6

Manufacturer Part Number
st20-gp6
Description
Gps Processor
Manufacturer
STMicroelectronics
Datasheet
ST20-GP6
InputInterrupts register
The InputInterrupts register is a read only register. It contains a vector which shows all of the input
interrupts, so bit 0 of the read data corresponds to InterruptIn0, bit 1 corresponds to InterruptIn1.
Low power controller support registers
The interrupt level controller has 2 additional registers to support the low power controller (see
Chapter 11 on page 66). The external interrupts can be used to provide a wake-up from power-
down mode.
The IntLPEnable register can be programmed for each interrupt to cause the interrupt to wake-up
the ST20-GP6 from power-down mode. The wake-up occurs when the interrupt goes either high or
low, depending on the setting of the respective bit in the IntActiveHigh register.
IntLPEnable
The IntLPEnable register can be set to enable a wake-up from power-down mode when the inter-
rupt occurs.
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IntPriority
Bit
Inputinterrupts
Bit
2:0
1:0
Bit field
Bit field
IntPriority
InterruptIn-0
Table 6.2 IntPriority register format - 1 register per interrupt
Interrupt level controller base address + #00 to #1C
Function
Determines the priority of each interrupt input.
Function
Input interrupt levels.
Table 6.3 InputInterrupts register format
IntPriority2:0
Interrupt level controller base address + #48
000
001
010
011
100
101
110
111
Asserts output interrupt
0 (lowest priority)
1
2
3
4
5
6
7 (highest priority)
Read/Write
Read only

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