st20-gp6 STMicroelectronics, st20-gp6 Datasheet - Page 79

• Manufacturer Part Number: st20-gp6
• Description: Gps Processor
• Manufacturer: STMicroelectronics

14.4 Controlling the diagnostic controller
This section gives a summary of host communications with the diagnostic controller.
The diagnostic controller has direct access to:
This access does not depend on the state of the CPU. Access to non-memory-mapped peripheral
configuration registers is via the CPU, and for this the CPU must be active and running the appro-
priate handler.
The host can give two commands to the diagnostic controller: peek and poke . Peek reads memory
locations or configuration registers, and poke writes to memory locations or configuration registers.
The diagnostic controller responds to a peek command with a peeked message, giving the con-
tents of the peeked addresses.
The diagnostic controller has registers, which are accessed from the host using peek and poke
commands. The registers are used to control breakpoints, watchpoints, datawatch, tracing and
other facilities.
The target CPU can also access these registers using the normal device load and store instruc-
tions, so the target software running on the CPU can program its own diagnostic controller. A lock
is provided to prevent CPU access, which can be released by the diagnostic controller when a
breakpoint or watchpoint match occurs.
In addition, the target CPU can peek and poke the host via the diagnostic controller by reading or
writing addresses in the top half of the memory space of the diagnostic controller. This facility can
be disabled.
Various different types of CPU events can be selected as trigger events . When an trigger event
occurs, the diagnostic controller can send a triggered message.
The four types of message are summarized in Table 14.1. The messages are distinguished by the
two least significant bits of the message header byte.
Messages may be initiated from either the host or the target. Target initiated messages, which con-
stitute asynchronous or unsolicited messages, can be enabled by a property bit.
Messages are composed of a header byte followed by zero or more data bytes, depending on the
type of message. The formats for the four message types are shown in Figure 14.2.
Message type
poke
peek
peeked
triggered
•
•
•
•
the instruction pointer,
a selection of CPU state control signals,
the memory bus,
memory-mapped peripheral configuration registers.
Direction
Command.
Command.
Opposite to peek command.
DCU to host.
Table 14.1 Types of diagnostic controller message
Bit 1
0
0
1
1
Bit 0
0
1
0
1
Write to one or more addresses.
Read from one or more addresses.
The result of a peek command.
A trigger event has occurred.
Meaning
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