ds3102 Maxim Integrated Products, Inc., ds3102 Datasheet - Page 62

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ds3102

Manufacturer Part Number
ds3102
Description
Stratum 3 Timing Card Ic With Synchronous Ethernet Support
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 4: Highest Priority Valid Reference (REF1[3:0]). This real-time status field indicates the highest priority
valid input reference. When T4T0 = 0 in the
the T0 DPLL. When T4T0 = 1, it indicates the highest priority reference for the T4 DPLL. Note that an input
reference cannot be indicated in this field if it has been marked invalid in the
the T0 DPLL is in nonrevertive mode (REVERT = 0 in the
as the SELREF[3:0] field. See Section 7.6.2.
Bits 3 to 0: Selected Reference (SELREF[3:0]). This real-time status field indicates the current selected
reference. When T4T0 = 0 in the
T4T0 = 1, it indicates the selected reference for the T4 DPLL. Note that an input clock cannot be indicated in this
field if it has been marked invalid in the
(REVERT = 0 in the
7.6.2.
Rev: 012108
____________________________________________________________________________________________ DS3102
0000 = No valid input reference available
0001 = Input IC1
0010 = Input IC2
0011 = Input IC3
0100 = Input IC4
0101 = Input IC5
0110 = Input IC6
0111 = {unused value}
1000 = Input IC8
1001 = Input IC9
1010 to 1111 = {unused values}
0000 = No source currently selected
0001 = Input IC1
0010 = Input IC2
0011 = Input IC3
0100 = Input IC4
0101 = Input IC5
0110 = Input IC6
0111 = {unused value}
1000 = Input IC8
1001 = Input IC9
1010 to 1111 = {unused values}
7
0
MCR3
register) this field may not have the same value as the REF1[3:0] field. See Section
6
0
MCR11
PTAB1
Priority Table Register 1
0Ah
REF1[3:0]
VALCR1
register, this field indicates the selected reference for the T0 DPLL. When
5
0
MCR11
or
VALCR2
register, this field indicates the highest priority reference for
4
0
MCR3
register. When the T0 DPLL is in nonrevertive mode
register) this field may not have the same value
0
3
VALCR1
2
0
SELREF[3:0]
or
VALCR2
1
0
register. When
62 of 141
0
0

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