ds3102 Maxim Integrated Products, Inc., ds3102 Datasheet - Page 75

• Manufacturer Part Number: ds3102
• Description: Stratum 3 Timing Card Ic With Synchronous Ethernet Support
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 3 to 0: T0 DPLL Force Selected Reference (T0FORCE[3:0]). This field provides a way to force a specified
input clock to be the selected reference for the T0 DPLL. Internally this is accomplished by forcing the clock to have
the highest priority (as specified in PTAB1:REF1). In revertive mode (MCR3:REVERT = 1) the forced clock
automatically becomes the selected reference (as specified in PTAB1:SELREF) as well. In nonrevertive mode the
forced clock only becomes the selected reference when the existing selected reference is invalidated or made
unavailable for selection.
When a reference is forced, the activity monitor and frequency monitor for that input and the T0 DPLL’s loss-of-lock
timeout logic all continue to operate and affect the relevant
reference is declared invalid the T0 DPLL is not allowed to switch to another input clock. The T0 DPLL continues to
respond to the fast activity monitor, transitioning to mini-holdover in response to short-term events and to full
holdover in response to longer events. See Section 7.6.3.
Rev: 012108
____________________________________________________________________________________________ DS3102
0000 = Automatic source selection (normal operation)
0001 = Force to IC1
0010 = Force to IC2
0011 = Force to IC3
0100 = Force to IC4
0101 = Force to IC5
0110 = Force to IC6
0111 = {unused value}
1000 = Force to IC8
1001 = Force to IC9
1010–1110 = {unused values}
1111 = Automatic source selection (normal operation)
—
7
0
—
6
0
MCR2
Master Configuration Register 2
33h
—
5
0
—
4
0
VALSR
1
3
and
MSR
register bits. However, when the
T0FORCE[3:0]
2
1
1
1
75 of 141
0
1