ds3102 Maxim Integrated Products, Inc., ds3102 Datasheet - Page 65

• Manufacturer Part Number: ds3102
• Description: Stratum 3 Timing Card Ic With Synchronous Ethernet Support
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 and 5 to 0: Input Clock Valid Status (IC8 and IC[6:1]). Each of these real-time status bits is set to 1 when
the corresponding input clock is valid. An input is valid if it has no active alarms (HARD = 0, ACT = 0, LOCK = 0 in
the corresponding
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Fast Holdover Frequency Ready (FHORDY). This real-time status bit is set to 1 when the T0 DPLL has a
holdover value that has been averaged over the 8-minute holdover averaging period. See the related latched
status bit in
Bit 6: Slow Holdover Frequency Ready (SHORDY). This real-time status bit is set to 1 when the T0 DPLL has a
holdover value that has been averaged over the 110-minute holdover averaging period. See the related latched
status bit in
Bit 0: Input Clock Valid Status (IC9). This bit has the same behavior as the bits in
Rev: 012108
____________________________________________________________________________________________ DS3102
0 = Invalid
1 = Valid
MSR4
MSR4
FHORDY
IC8
7
0
7
0
ISR
and Section 7.7.1.6.
and Section 7.7.1.6.
register). See also the
SHORDY
—
6
0
6
0
VALSR1
Input Clock Valid Status Register 1
0Eh
VALSR2
Input Clock Valid Status Register 2
0Fh
IC6
—
5
0
5
0
MSR1
register and Section 7.5.
IC5
—
4
0
4
0
IC4
—
0
0
3
3
IC3
—
2
0
2
0
VALSR1
but for the IC9 clock.
IC2
—
1
0
1
0
65 of 141
IC1
IC9
0
0
0
0