mg82fel308 Megawin Technology, mg82fel308 Datasheet - Page 15

• Manufacturer Part Number: mg82fel308
• Description: A Single-chip Microcontroller Based On A High Performance 1-t Architecture 80c51
• Manufacturer: Megawin Technology

6. System Clock
6.1. Clock Structure
6.2. Clock Register
CKCON0: Clock Control Register 0
SFR Address
SFR Page
Bit 7~3: Reserved.
Bit 2~0: SCKS2 ~ SCKS0, programmable System Clock Selection.
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
15/84
7
R
-
XTAL1
XTAL2
MEGAWIN
MAKE YOU WIN
SCKS[2:0]
= 0xC7
= All
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Hardware Option:
6
R
Enable ENRCO
-
Oscillating
Oscillator
Internal
Circuit
5
R
-
CLKin
CLKin /2
CLKin /4
CLKin /8
CLKin /16
CLKin /32
CLKin /64
CLKin /128
AUXR0.P60OC[1:0]
System Clock (Fosc)
0
1
4
R
-
Reset Value = xxxx-x000
OSCin
SFR.P6.0
3
R
-
ℵ
ℵ
2
4
SCKS2
R/W
2
0
1
2
3
XCKS[5:0]
SCKS[2:0]
SCKS1
MG82FE(L)308/316
R/W
1
Preliminary, v 0.04
SCKS0
ISP/IAP Logic
SYSCLK
(System Clock )
XTAL2/P6.0
R/W
0