mg82fel308 Megawin Technology, mg82fel308 Datasheet - Page 53

• Manufacturer Part Number: mg82fel308
• Description: A Single-chip Microcontroller Based On A High Performance 1-t Architecture 80c51
• Manufacturer: Megawin Technology

12.3.2. PWM Timer Register
CMOD: PWM timer Mode Register
SFR Address
SFR Page
Bit 7: CIDL, Counter Idle Control.
0: Program the PWM Timer to continue functioning during IDLE mode.
1: Program the PWM Timer to be gated off during IDLE mode.
Bit 6~4: POS[2:0], PWM output port select.
Bit 3~1: CPS[2:0], Counter Prescaler Select.
Bit 0: ECF, Enable PWM Timer underflow interrupt.
0: Disables CF bit in CCON to generate an interrupt.
1: Enables CF bit in CCON to generate an interrupt.
CCON: PWM timer Control Register
SFR Address
SFR Page
Bit 7: CF, PWM timer underflow Flag.
0: This flag can only be cleared by software.
1: Set by hardware when the counter rolls under. CF flags an interrupt if bit ECF in CMOD is set. CF may be set
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
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by either hardware or software.
CIDL
R/W
R/W
CF
7
7
MEGAWIN
MAKE YOU WIN
POS2
POS[2:0]
X X X
CPS[2:0]
= 0xD9
= All
= 0xD8
= 0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
R/W
R/W
CR
6
6
POS1
R/W
5
5
R
-
PWMEN
1
1
1
1
1
1
1
1
0
Prescaler
POS0
R/W
128
16
32
64
4
4
R
1
2
4
8
-
Reset Value = 0000-0000
Reset Value = 00XX-0XXX
(AUXR1.P5PWM=0)
PWM Output Port
Disabled
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
PWMEN
CPS2
R/W
R/W
3
3
CPS1
(AUXR1.P5PWM=1)
R/W
2
2
R
PWM Output Port
-
Disabled
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.6
P5.7
CPS0
MG82FE(L)308/316
R/W
1
1
R
-
Preliminary, v 0.04
ECF
R/W
0
0
R
-