mg82fel308 Megawin Technology, mg82fel308 Datasheet - Page 56

• Manufacturer Part Number: mg82fel308
• Description: A Single-chip Microcontroller Based On A High Performance 1-t Architecture 80c51
• Manufacturer: Megawin Technology

13.1. Serial Port Mode 0
Serial data enters and exits through RXD. TXD outputs the shift clock. 8 bits are transmitted/received: 8 data bits
(LSB first). The shift clock source can be selected to 1/12 or 1/2 the system clock frequency by URM0X6 setting
in AUXR2 register. Figure 13-3 shows a simplified functional diagram of the serial port in Mode 0.
Transmission is initiated by any instruction that uses SBUF as a destination register. The “write to SBUF” signal
triggers the UART engine to start the transmission. The data in the SBUF would be shifted into the RXD(P3.0) pin
by each raising edge shift clock on the TXD(P3.1) pin. After eight raising edge of shift clocks passing, TI would be
asserted by hardware to indicate the end of transmission. Figure 13-4 shows the transmission waveform in Mo
0.
Reception is initiated by the condition REN=1 and RI=0. At the next instruction cycle, the Serial Port Controller
writes the bits 11111110 to the receive shift register, and in the next clock phase activates Receive.
Receive enables Shift Clock which directly comes from RX Clock to the alternate output function of P3.1 pin.
When Receive is active, the contents on the RXD(P3.0) pin would be sampled and shifted into shift register by
falling edge of shift clock. After eight falling edge of shift clock, RI would be asserted by hardware to indicate the
end of reception. Figure 13-5 shows the reception waveform in Mode 0.
Figure 13-3 Serial Port Mode 0
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
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2
“ 0＂
SYSCLK
REN
“ 1＂

__
RI
12
MEGAWIN
MAKE YOU WIN
AUXR2.URM0X6
RXSTART
TX Clock
RX Clock
SBUF
SBUF
Write
Read
80C51 Internal BUS
80C51 Internal BUS
UART engine
TI
RI
Shift-clock
RXBUF
TXBUF
Serial Port Interrupt
MG82FE(L)308/316
Preliminary, v 0.04
RXD Alternated
for Input /output
Function
TXD Alternated
for output
Function
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