mg82fel308 Megawin Technology, mg82fel308 Datasheet - Page 41

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mg82fel308

Manufacturer Part Number
mg82fel308
Description
A Single-chip Microcontroller Based On A High Performance 1-t Architecture 80c51
Manufacturer
Megawin Technology
Datasheet
12.1.4. Mode 3 Structure
Timer1 in Mode3 simply holds its count, the effect is the same as setting TR1 = 1. Timer0 in Mode 3 enables TL0
and TH0 as two separate 8-bit counters. TL0 uses the Timer0 control bits such like C/T, GATE, TR0, INT0 and
TF0. TH0 is locked into a timer function (can not be external event counter) and take over the use of TR1, TF1
from Timer1. TH0 now controls the Timer1 interrupt.
12.1.5. Timer Clock-Out Structure
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
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T0/T1 Clock-out Frequency =
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
Ξ
MEGAWIN
MAKE YOU WIN
12
Ξ
Ξ
12
12
nINT0 Pin
nINTx Pin
T0 Pin
GATE
GATE=0
TR0
TR1
AUXR2.TxX12=0
AUXR2.TxX12=1
C/T=0
TRx
AUXR2.T0X12=0
AUXR2.T0X12=1
AUXR2.T0X12=0
AUXR2.T0X12=1
C/T=0
C/T=1
SYSCLK Frequency
n X (256 – THx)
THx[7:0]
TLx[7:0]
TH0[7:0]
TL0[7:0]
Reload
Overflow
AUXR2.TxCKOE = 1
Overflow
Overflow
; n=24, if TxX12=0
; n=2, if TxX12=1
; x = 0 or 1 & C/T = 0
MG82FE(L)308/316
D
CK
Q
Q
Preliminary, v 0.04
TF0
TF1
x = 0 or 1
Interrupt
Interrupt
TxCKO

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