s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 111

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s908ey16g2vfar

Manufacturer Part Number
s908ey16g2vfar
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The vector fetch or software clear and the return of the IRQ pin to logic 1 can occur in any order. The
interrupt request remains pending as long as the IRQ pin is at logic 0. A reset will clear the latch and the
MODE control bit, thereby clearing the interrupt even if the pin stays low.
If the MODE bit is clear, the IRQ pin is falling-edge sensitive only. With MODE clear, a vector fetch or
software clear immediately clears the IRQ latch.
The IRQF bit in the ISCR register can be used to check for pending interrupts. The IRQF bit is not affected
by the IMASK bit, which makes it useful in applications where polling is preferred.
Use the BIH or BIL instruction to read the logic level on the IRQ pin.
Freescale Semiconductor
When using the level-sensitive interrupt trigger, avoid false interrupts by
masking interrupt requests in the interrupt routine.
YES
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
INSTRUCTION?
INSTRUCTION?
INSTRUCTION
FROM RESET
INTERRUPT?
FETCH NEXT
I BIT SET?
Figure 9-2. IRQ Interrupt Flowchart
SWI
RTI
NO
NO
NO
NO
YES
YES
YES
NOTE
LOAD PC WITH INTERRUPT VECTOR
UNSTACK CPU REGISTERS
EXECUTE INSTRUCTION
STACK CPU REGISTERS
SET I BIT
IRQ Pin
111

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