s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 189

• Manufacturer Part Number: s908ey16g2vfar
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

In a slave SPI (MSTR = 0), the MODF bit generates an SPI receiver/error CPU interrupt request if the
ERRIE bit is set. The MODF bit does not clear the SPE bit or reset the SPI in any way. Software can abort
the SPI transmission by toggling the SPE bit of the slave.
To clear the MODF flag, read the SPSCR and then write to the SPCR register. This entire clearing
procedure must occur with no MODF condition existing or else the flag will not be cleared.
15.7 Interrupts
Four SPI status flags can be enabled to generate CPU interrupt requests:
The SPI transmitter interrupt enable bit (SPTIE) enables the SPTE flag to generate transmitter CPU
interrupt requests.
The SPI receiver interrupt enable bit (SPRIE) enables the SPRF bit to generate receiver CPU interrupt,
provided that the SPI is enabled (SPE = 1).
The error interrupt enable bit (ERRIE) enables both the MODF and OVRF flags to generate a
receiver/error CPU interrupt request.
The mode fault enable bit (MODFEN) can prevent the MODF flag from being set so that only the OVRF
flag is enabled to generate receiver/error CPU interrupt requests.
Freescale Semiconductor
SPTE (Transmitter Empty)
SPRF (Receiver Full)
OVRF (Overflow)
MODF (Mode Fault)
occurring. Therefore, MODF does not occur since a transmission was
never begun.
A logic 1 voltage on the SS pin of a slave SPI puts the MISO pin in a high
impedance state. Also, the slave SPI ignores all incoming SPSCK clocks,
even if a transmission has begun.
ERRIE
MODF
OVRF
Flag
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
Figure 15-9. SPI Interrupt Request Generation
SPI Transmitter CPU Interrupt Request (SPTIE = 1)
SPI Receiver CPU Interrupt Request (SPRIE = 1)
SPI Receiver/Error Interrupt Request (SPRIE = 1, ERRIE = 1)
SPI Receiver/Error Interrupt Request (SPRIE = 1, ERRIE = 1, MODFEN = 1)
SPRIE
SPTE
Table 15-2. SPI Interrupts
SPTIE
SPRF
SPE
NOTE
Request
SPI TRANSMITTER
CPU INTERRUPT REQUEST
SPI RECEIVER/ERROR
CPU INTERRUPT REQUEST
Interrupts
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