s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 251

• Manufacturer Part Number: s908ey16g2vfar
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

19.4.1 Variables Used in the Routines
The Verify, fProgram, and fErase routines require certain registers and/or RAM locations to be initialized
before calling the routines in the user software.
locations.
19.4.2 How to Use the Routines
This section describes the details of each routine.
on-chip FLASH routines for each MCU type and summarizes the five routines.
Freescale Semiconductor
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fProgram — This routine is used to program a contiguous range of FLASH locations.
Programming data is first loaded into the DATA array. The DATA array locations and the variable
locations required for this routine are at fixed memory addresses. fProgram can be used when the
internal operating frequency (f
fErase — This routine is used to erase either a page (64 bytes) or the whole array of FLASH. The
variable locations required for this routine are at fixed memory addresses. This routine can be used
when the internal operating frequency (f
CPUSPD — To set up proper delays used in the fProgram and fErase routines, a value indicating
the internal operating frequency (f
$0049. The CPUSPD value is the nearest integer of f
MHz, the CPUSPD value is 17. If f
value is very important to program or erase the FLASH successfully.
LADDR — A range specifies the FLASH locations to be read, verified, or programmed. The 16-bit
value in RAM addresses $004A and $004B holds the last address of a range. The addresses
$004A and $004B are the high and low bytes of the last address, respectively. LADDR is used for
Verify and fProgram routines.
DATA — DATA is the first location of the DATA array and is located at RAM address $004C. The
array is used for loading program or verify data. The DATA array must be in the zero page and its
size must match the size of the range to be programmed or verified.
Registers H:X — In the Verify and fProgram routines, registers H and X are initialized with a 16-bit
value representing the first address of a range. High and low bytes of the address are stored to
registers H and X, respectively. In the fErase routine, registers H and X are initialized with an
address which is within the page to be erased or with the address of the block protect register
(FLBPR) if the entire array to be erased.
$0040–$0048
$004A:$004B
Location
$004C
$0049
Variable Name
Reserved
CPUSPD
LADDR
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
DATA
Table 19-9. Variables and Their Locations
op
) is between 1.0 MHz and 8.0 MHz.
op
op
Size (Bytes)
) must be stored at CPUSPD, which is located at RAM address
is 2.1 MHz, the CPUSPD value is 8. Setting a correct CPUSPD
Varies
9
1
2
op
Table 19-9
) is between 1.0 MHz and 8.0 MHz.
Table 19-10
Reserved for future use
CPU speed — the nearest integer of f
for example, if f
Last address of a 16-bit range
First location of DATA array;
DATA array size must match a programming or
verifying range
shows variables used in the routines and their
op
provides necessary addresses used in the
(in MHz) times 4. For example, if f
op
= 2.4576 MHz, CPUSPD = 10
Description
Routines Supported in ROM
op
(in MHz) × 4;
op
is 4.2
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