s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 156

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s908ey16g2vfar

Manufacturer Part Number
s908ey16g2vfar
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Enhanced Serial Communications Interface (ESCI) Module
13.8.8 ESCI Prescaler Register
The ESCI prescaler register (SCPSC) together with the ESCI baud rate register selects the baud rate for
both the receiver and the transmitter.
PDS2–PDS0 — Prescaler Divisor Select Bits
PSSB4–PSSB0 — Clock Insertion Select Bits
Use the following formula to calculate the ESCI baud rate:
where:
156
These read/write bits select the prescaler divisor as shown in
These read/write bits select the number of clocks inserted in each 32 output cycle frame to achieve
more timing resolution on the average prescaler frequency as shown in
PSSB4–PSSB0.
Frequency of the SCI clock source = f
BPD = Baud rate register prescaler divisor
BD = Baud rate divisor
PD = Prescaler divisor
PDFA = Prescaler divisor fine adjust
Address:
There are two prescalers available to adjust the baud rate. One in the ESCI
baud rate register and one in the ESCI prescaler register.
The setting of ‘000’ will bypass not only this prescaler but also the Prescaler
Divisor Fine Adjust (PDFA). It is not recommended to bypass the prescaler
while ENSCI is set, because the switching is not glitch free.
Reset:
Read:
Write:
$0017
PDS2
Bit 7
0
Baud rate =
Figure 13-17. ESCI Prescaler Register (SCPSC)
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
PDS[2:1:0]
Table 13-9. ESCI Prescaler Division Ratio
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
PDS1
6
0
Frequency of the SCI clock source
64 x BPD x BD x (PD + PDFA)
in the CONFIG2 register)
Bus
PDS0
5
0
or CGMXCLK (selected by ESCIBDSRC
NOTE
NOTE
PSSB4
4
0
Prescaler Divisor (PD)
Bypass this prescaler
PSSB3
3
0
2
3
4
5
6
7
8
Table
PSSB2
2
0
13-9. Reset clears PDS2–PDS0.
Table
PSSB1
1
0
13-10. Reset clears
Freescale Semiconductor
PSSB0
Bit 0
0

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