s908ey16g2vfar Freescale Semiconductor, Inc, s908ey16g2vfar Datasheet - Page 257

• Manufacturer Part Number: s908ey16g2vfar
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

19.4.2.4 fProgram
fProgram is used to program a range of FLASH locations with data loaded into the DATA array. All bytes
that will be programmed must be in the same row. Programming data is passed to fProgram in the DATA
array. All data in the DATA array must be in the zero page. The size of the DATA array must match the
size of a specified programming range. This routine supports an internal operating frequency between 1.0
MHz and 8.0 MHz.
For this split-gate FLASH, the programming algorithm requires a programming time (t
and 40
value is the nearest integer of f
value is 10 ($0A). If f
All programming is done using one programming algorithm. The algorithm allows for programming a
single byte in each pass through it (one-byte programming method). Or, a whole row may be programmed
by looping within the algorithm to write all the values in the row (row programming method).
In fProgram, the high programming voltage time is enabled for less than 125
single byte at any internal operating frequency between 1.0 MHz and 8.0 MHz. Therefore, even when a
row is programmed by 32 separate single-byte programming operations, the cumulative high voltage
programming time is less than the maximum t
programming time to the same row before the next erase. For more information, refer to the memory
characteristics in
This routine does not confirm that all bytes in the specified range are erased prior to programming. Nor
does this routine perform a verification after programming, so there is no return confirmation that
programming was successful. To program data successfully, the user software is responsible for these
verifying operations. The Verify routine can be used to compare a programmed FLASH range against the
DATA array.
Freescale Semiconductor
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•
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Case 1
Case 2
When the COPD bit in CONFIG1 is cleared and COP is therefore enabled, care must be taken to
keep any programming operation from interfering with the servicing of the COP. In this case, each
FLASH byte in the range is programmed using the one-byte programming method. Therefore,
there are no limitations on range size and row/page boundary, but the total time to program multiple
bytes is longer than the row programming method.
When COPD bit is set (COP is disabled) and all programming addresses are in the same row, all
FLASH bytes can be programmed at the same time using the row programming method. In this
way, the FLASH can be programmed quickly.
When COPD bit is set (COP is disabled) and a program range extends beyond a row or page, each
FLASH byte in the range is programmed with the one-byte programming method until the
beginning of the last row is reached. Then the bytes in the last row are programmed using the row
programming method. However in this case, a programming range can not cross a boundary from
$xxFF to $xx00. If a range crosses this boundary, programming data will not be guaranteed.
μ
s.
Table 19-12
Internal Operating Freq. (f
1.0 MHz ≤ f
1.125 MHz ≤ f
Chapter 20 Electrical
op
is 8.0 MHz, the CPUSPD value is 32 ($20).
shows how t
Table 19-12. t
op
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
op
< 1.125 MHz
op
≤ 8.0 MHz
(in MHz) multiplied by 4. For example, if f
prog
op
prog
Specifications.
)
is adjusted by a CPUSPD value in this routine. The CPUSPD
vs. Internal Operating Frequency
HV
CPUSPD
5 to 32
(4 ms). The t
4
8 x CPUSPD + 5
t
HV
prog
is defined as the cumulative high voltage
(Cycles)
38
op
is 2.4576 MHz, the CPUSPD
μ
33.8 μs < t
32.6 μs ≤ t
s when programming a
Routines Supported in ROM
prog
t
prog
prog
prog
) between 30
≤ 38.0 μs
≤ 40.0 μs
257
μ
s