pcf8833 NXP Semiconductors, pcf8833 Datasheet - Page 29

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pcf8833

Manufacturer Part Number
pcf8833
Description
Stn Rgb - 132 X 132 X 3 Driver
Manufacturer
NXP Semiconductors
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
pcf8833U/2DC/1
Manufacturer:
TOSHIBA
Quantity:
32
Philips Semiconductors
The following steps must be followed to enter the Partial
mode:
2003 Feb 14
handbook, full pagewidth
Set V
the Partial mode is predefined)
Set bias system (when the MMOTP cells are used the
bias system for the Partial mode is predefined)
Set start address of active area AA1S[7:0]; can be set in
multiples of 4
Set end address of active area AA1E[7:0] + 1; can be
set in multiples of 4
Enter Partial mode (PTLON).
STN RGB - 132
AA1E [ 7:0 ] +1 = 36
AA1S [ 7:0 ] = 4
OP
rows
32
(when the MMOTP cells are used the V
132
partial area
Fig.8 Partial Display mode for LAO = 0.
3 driver
RAM
OP
for
29
When setting the addresses the following conditions must
be ensured:
Figure 8 shows how to use the Partial mode with Line
Address Order (LAO) set to logic 0. Figure 9 gives an
example of Partial mode with LAO set to logic 1, and
Fig.10 shows the position of the partial area when the start
address of the active area is AA1S
AA1S
Figure 11 shows how the Partial mode can be used.
(AA1E + 1)
setting is possible)
AA1
101 (AA1S must be set in multiples of 4).
0 and AA1E
127
128
129
130
131
10
11
12
13
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
0
1
2
3
4
5
6
7
8
9
AA1S
131.
32 (only 1 partial display size
ROW 0
ROW 1
ROW 2
ROW 3
ROW 4
ROW 5
ROW 6
ROW 7
ROW 8
ROW 9
ROW 10
ROW 11
ROW 12
ROW 13
ROW 24
ROW 25
ROW 26
ROW 27
ROW 28
ROW 29
ROW 30
ROW 31
ROW 32
ROW 33
ROW 34
ROW 35
ROW 36
ROW 37
ROW 38
ROW 39
ROW 40
ROW 41
ROW 42
ROW 127
ROW 128
ROW 129
ROW 130
ROW 131
Objective specification
partial area
(131 + 1)
display
PCF8833
MGU917
31, i.e.

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