pcf8833 NXP Semiconductors, pcf8833 Datasheet - Page 84

• Manufacturer Part Number: pcf8833
• Description: Stn Rgb - 132 X 132 X 3 Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
15.3
The module maker programming is performed in the
Calibration mode. This mode is entered via a special
interface command (CALMM). To prevent erroneous
programming, a seal bit has been implemented which
prevents the device from entering Calibration mode. This
seal bit, once programmed, cannot be reversed, thus
further changes in programmed values are not possible.
Applying the programming voltage when not in CALMM
mode will have no effect on the programmed values.
Table 89 Seal bit definition
15.4
An OTP cell is divided into a non-volatile programmable
instance containing the value and a register, where the
value is made accessible to the rest of the chip.
In the PCF8833 104 OTP cells are available for the
module maker. These cells are organised in a matrix of
7 rows and 15 columns, where the last row is only partially
used; see Table 90. All the rows of one particular column
of the matrix are filled in parallel by sending 1 byte of data
with the OTPSHTIN command. Byte 15 is sent first
(containing PVB[3:0], BRS and TRS) and byte 0 last
(containing MMVOP[5:0] or SEAL).
2003 Feb 14
handbook, full pagewidth
SEAL BIT
STN RGB - 132
0
1
Seal bit
OTP architecture
Calibration mode enabled
Calibration mode disabled
INTERFACE
132
ACTION
3 driver
OTP DEFAULTS
Fig.56 Factory defaults.
e.g. SLA [ 2:0 ]
e.g. SLA [ 2:0 ]
INTERFACE
INTERFACE
REGISTERS
OTP CELL
default = 1
default = 0
SFD
EFD
84
Bit 7 of every data byte is not used. An example sequence
on how to fill the matrix is given in Table 96.
The default value of the OTP cells is shown in Table 91.
These values may be changed by programming the OTP
cell. The programming of a cell will invert the default value.
This inversion may only happen once per cell, as the
programming is irreversible.
Table 93 shows an example on how to program the OTP
cells to receive the values given in Table 92. Some
examples are given below:
1. The default for DFA[0] is 0; see Table 91, and it is
2. The default for DFA[4] is 1; see Table 91, and it is
3. The default for DFA[5] is 1; see Table 91, and it is
4. The default for DFA[6] is 0; see Table 91, and it is
required to have DFA[0] = 1; see Table 92. This
means that the value needs to be inverted. Therefore
the OTP cell has to be programmed (a 1 in Table 93).
required to have DFA[4] = 0; see Table 92. This
means that the value needs to be inverted. Therefore
the OTP cell has to be programmed (a 1 in Table 93).
required to have DFA[5] = 1; see Table 92. This
means that it is not necessary to change the value.
Therefore it is not necessary to program the OTP cell
(a 0 in Table 93).
required to have DFA[6] = 0; see Table 92. This
means that it is not necessary to change the value.
Therefore it is not necessary to program the OTP cell
(a 0 in Table 93).
0
1
OR
to temperature
compensation circuit
MGU972
Objective specification
PCF8833