pcf8833 NXP Semiconductors, pcf8833 Datasheet - Page 55

• Manufacturer Part Number: pcf8833
• Description: Stn Rgb - 132 X 132 X 3 Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 67 Offset value
6.2.41
The PCF8833 incorporates temperature segmented
Frame frequency programming (TCDF). The temperature
range is split into 4 areas as shown in Fig.31.
In each of the segments a Division Factor (DF) can be
programmed which determines the Frame Frequency
(FF). In equation (2) the frame frequency can be
calculated from a given division factor.
Table 68 Frame frequency programming register bits; note 1
Note
1. X = don’t care.
2003 Feb 14
FF
STN RGB - 132
D/C
=
0
1
1
1
1
TEMPERATURE RANGE
--------- -
132
------------------------- -
1
F
DF
RAME FREQUENCY PROGRAMMING
40 C to < 10 C
20 C to < 50 C
f
50 to < 80 C
10 to < 20 C
osc
< 40 C
X
X
X
X
7
1
80 C
DFC
DFD
DFB
DFA
6
1
132
6
6
6
6
DFC
DFD
DFB
DFA
3 driver
5
0
5
5
5
5
TD EQUIVALENT
DFC
DFD
DFB
DFA
4
0
96 to 127
(2)
4
32 to 63
64 to 95
4
4
4
0 to 31
>127
55
0
Where f
Chapter 13.
The Divider Factor (DF) is a 7-bit number so the upper
programming range is limited to 127DEC resulting in a
minimum frame frequency of 35.8 Hz. The lower
programming range is limited to 20DEC resulting in a
maximum frame frequency of 227 Hz. The frame
frequency is derived from the built-in oscillator, and thus
the tolerance of the frame frequency has the same ratio as
that given for the oscillator frequency; see Chapter 13.
When Partial mode is selected (see Sections 6.2.10 and
6.2.23) the same segmented frame frequencies will be
used as for the full Display mode.
DFC
DFD
DFB
DFA
3
0
3
3
3
3
osc
is the oscillator frequency which is defined in
DFC
DFD
DFB
DFA
2
1
2
2
2
2
((32
(32
DFC
DFD
DFB
DFA
OFFSET EQUATION VT
1
0
(32
MB) + MA
1
1
1
1
32
(64
MC) + MD
(TD
MC + 31
(MB + MA)
Objective specification
TD)
64)
DFC
DFD
DFB
DFA
0
1
PCF8833
0
0
0
0
MB
(32
MC
(TD
MD)
DEFAULT
TD)
96))
C5H
38H
35H
30H
25H