ep2sgx30c Altera Corporation, ep2sgx30c Datasheet - Page 50

• Manufacturer Part Number: ep2sgx30c
• Description: Stratix Ii Gx Device Data Sheet
• Manufacturer: Altera Corporation

Transceivers
2–42
Stratix II GX Device Handbook, Volume 1
f
The dynamic reconfiguration block can dynamically reconfigure the
following PMA settings:
■
■
■
The channel reconfiguration allows you to dynamically modify the data
rate, local dividers, and the functional mode of the transceiver channel.
Refer to the Stratix II GX Device Handbook,
information.
The dynamic reconfiguration block requires an input clock between
2.5 MHz and 50 MHz. The clock for the dynamic reconfiguration block is
derived from a high-speed clock and divided down using a counter.
Individual Power Down and Reset for the Transmitter and Receiver
Stratix II GX transceivers offer a power saving advantage with their
ability to shut off functions that are not needed. The device can
individually reset the receiver and transmitter blocks and the PLLs. The
Stratix II GX device can either globally or individually power down and
reset the transceiver.
signals and the Stratix II GX transceiver blocks. These reset signals can be
controlled from the FPGA or pins.
Pre-emphasis settings
Equalizer and DC gain settings
Voltage Output Differential (V
Table 2–16
shows the connectivity between the reset
OD
) settings
volume
2, for more
Altera Corporation
October 2007