mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 27

• Manufacturer Part Number: mc68336
• Description: An Introduction To The Mc68331 And Mc68332
• Manufacturer: Freescale Semiconductor, Inc

Only ten pins on the board, a special cable, and software are needed to debug. The M68ICD32 cable has
a 10-pin female connector on one end and a PAL with a 25-pin connector on the other end. The 10-pin con-
nector will plug directly into a male header or connector with the layout shown in Figure 17. The PAL end
of the cable plugs into the parallel port of a PC. The PC runs the debugger software that controls the MCU
in BDM.
3.1.2.2 How BDM Works
The debugger causes the MCU to enter debugging mode by driving the BKPT pin low at the release of the
RESET signal. Reset causes the MCU to fetch the reset exception vectors, load the program counter and
stack pointer, then fetch the first instruction pointed to. Since the SRAM module is disabled out of reset,
reset vector fetches are made from external memory enabled by the CSBOOT signal. If the CSBOOT chip-
select circuit is configured to enable a 16-bit port (DATA0 = 1 at release of RESET), the first word of the
instruction is fetched, however, if the CSBOOT chip-select circuit is configured to enable an 8-bit port
(DATA0 held low at the release of RESET), the MCU fetches the first byte of the instruction. The MCU then
enters BDM.
At this point the debugger causes the MCU to fetch several instructions, which are displayed in the debug-
ger window on the computer screen. If valid stack pointer and program counter values are present, and a
valid program is resident at the address pointed to by the initial PC value, the debugger will display the code
beginning at the program counter address.
If the initial stack pointer and program counter values are not valid, however, or if the external memory is
either not connected or uninitialized when the fetches are made, it is very likely that the initial SP and PC
values will be $FFFFFFF. CSBOOT is the only chip-select circuit that is active out of reset, and it enables
only the first one Mbyte of memory — when the first instruction fetches are made at $FFFFFF, there will be
nothing to generate DSACK and terminate the bus cycle, and the debugger software will force a bus error.
Should this occur, the debugger generally displays a series of “Memory implementation error: debugger
supplied DSACK” messages on the computer screen. After the debugger software has finished making the
scheduled number of program fetches, the error messages will stop, and the MCU will be in BDM waiting
for the next debugger command. However, additional errors will occur if the next command is an external
memory access because the program counter and stack pointer values are invalid.
When using a software background mode debugger to boot an MCU from external RAM or uninitialized
ROM, it is imperative that the following actions be taken immediately after starting the debugger:
MC68331/332
M68331/332TUT/D
10-Pin Connector
1. Load a value into address register A7 to serve as a stack pointer value. It must point to a modifiable
2. Load the address of the first instruction to be executed into the program counter.
memory address.
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9
8-Pin Connector
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Freescale Semiconductor, Inc.
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For More Information On This Product,
BKPT/DSCLK
Table 4 BDM Connections
IFETCH/DSI
Go to: www.freescale.com
IPIPE/DSO
FREEZE
RESET
BERR
Signal
GND
GND
V
DS
DD
Data Strobe
Output from ICD to BERR input
Ground Reference
Output from ICD to BKPT input; assertion causes MCU to
first enable and then enter background mode. Once in
BDM, this pin becomes the serial clock.
Ground Reference
Output from MCU indicating whether it is operating normal-
ly or is in BDM
Device reset
Serial input data to the MCU in BDM
Device Operating Voltage
Serial output data from the MCU in BDM
Use
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