mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 41

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mc68336

Manufacturer Part Number
mc68336
Description
An Introduction To The Mc68331 And Mc68332
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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General-Purpose I/O: Many of the GPT pins can be used as general-purpose I/O. All that is needed to con-
figure a pin to general-purpose I/O is to select the data direction in the data direction register (called PDDR
in older manuals and DDRGP in newer manuals) and the actual data in the data register (called PDR in
older manuals and PORTGP in newer manuals). Take special care when writing data to the data register,
since a read of this register returns the actual pin state and not the data just written to it. Beware of the fol-
lowing scenario:
4.5.1 GPT Interrupts
Several steps must be followed in order for a GPT channel to request interrupt service.
MC68331/332
M68331/332TUT/D
The current value of PORTGP is $FF. The user software wishes to clear bit 0 and then OR this bit with
a value in another register, which also happens to be zero. Thus, the end result should be $FE. To ac-
complish this, the software does a BCLR instruction immediately followed by an OR instruction. How-
ever, there is a good probability that after the BCLR instruction, the pin state will not have changed by
the time the CPU reads PORTGP again for the OR instruction. Thus, the CPU could read the value $FF
from PORTGP instead of $FE and end up with the wrong result. To avoid this scenario, put a NOP or
a different instruction between two read-modify-write instructions involving the PORTGP register.
1. Store the starting address of the interrupt service routine in the CPU interrupt vector table.
2. Store an interrupt priority level for the GPT in bits ten through eight of the ICR.
3. If desired, specify which interrupt source within the GPT has the highest priority by writing to bits 15
4. Store an interrupt arbitration value in the IARB field of the GPT module configuration register.
The IARB field value determines precedence when the CPU receives more than one interrupt request
of the same interrupt priority level. Each interrupting module must be assigned a unique IARB number
between $01 (lowest precedence) and $0F (highest precedence).
A. The location in the vector table where the service routine starting address is stored is called the
B. The interrupt vector number is formed by concatenating a base vector number with the vector
This value determines the priority of GPT interrupt service requests. The value must be a number
between one and seven — level seven has the highest priority, and level one has the lowest. The
value stored in the IPL field in the CPU status register determines whether an interrupt request is rec-
ognized. The value in the IPL field must be lower than the GPT interrupt priority level in order for the
GPT to interrupt the CPU, unless the interrupt level is seven, in which case it cannot be masked.
–12 of the ICR.
This value determines which interrupt source within the GPT has the highest priority. As Table 7-1 on
page 7-3 in the GPT Reference Manual (GPTRM/AD) shows, each interrupt source within the GPT
is pre-assigned a priority. However, the user can pick one of those sources to have the highest prior-
ity. For example, if a $4 is written to bits 15–12 of the ICR, then OC1 will have the highest priority.
When OC1 generates an interrupt, the low nibble of the vector will be $0 instead of $4. The remaining
channels maintain their original relative priority and vector addresses.
vector address. The vector address is calculated from the interrupt vector number — the address
is two times the vector number.
number given in Table 7-1 on page 7-3 in the GPT Reference Manual (GPTRM/AD). As shown in
Table 7-1, each timer channel has a separate vector number. Choose a base vector number and
write it to bits seven through four in the GPT interrupt configuration register (ICR). For example,
choosing a base vector number of $81 would assign interrupt vector $80 to input capture 1, inter-
rupt vector $82 to input capture 2, interrupt vector $83 to input capture 3, and so on, through as-
signment of interrupt vector $8B to pulse accumulator input flag.
For example, if output compare 1 is being set up to request interrupt service, the interrupt vector
is $84. The vector address is:
Thus, the starting address of the interrupt routine must be stored in location $108.
2 $84
$108
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41

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