mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 52

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mc68336

Manufacturer Part Number
mc68336
Description
An Introduction To The Mc68331 And Mc68332
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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In Table 8 the addresses for CS0 and CS10 conflict. Both will respond to the address $40000. CS0 is pro-
grammed to start at $50000; however, it is programmed incorrectly. It does not lie on an even boundary of
128 Kbytes (remember that 1 Kbyte = 1024 bytes). As shown in Table 9, only address lines 23 through 17
are compared for a block size of 128 Kbytes. The address decoding process works as follows.
CSBAR0: $0504 = base address of $50000 and block size of 128K.
For a 128 Kbyte block size, address lines 16 – zero are decoded as zero. As a result, bits 19–16 are read
as a four instead of a five, and CS0 responds to the address space starting at location $40000. However,
CS10 is also programmed to respond to the address space starting at location $40000. It is acceptable for
two chip-select circuits to respond to the same address space; however, in this case, the option registers
are programmed for a different number of wait states. As a result, the first termination signal seen will be
from CS0 after 3 wait states on any read or write access, possibly before the external device is ready to
respond, especially if it was meant to have CS10 terminate the cycle after 12 wait states.
To correct the problem, the values in CSBAR0 and/or CSBAR10 must be changed. If the value in CSBAR0
is changed to $0404, and the value in CSBAR10 is changed to a base address that does not overlap, such
as $0300, then $40000 is an acceptable base address for CS0, since it is an exact multiple of 128 Kbytes.
That is:
5.2.8.1 Problem: The QSPI Pins do not Output the Desired Levels
All QSPI pins are also controlled by the data register and data direction register associated with the QSM
even if the pins are configured for QSPI operation in the pin assignment register. Whenever the QSPI is not
active, control of these pins reverts to these registers. Thus, always initialize the data register and data di-
rection register with the desired inactive states of the QSPI pins. See 4.4.2 Configuring the QSPI for more
information.
6.1 Technical Literature
All Freescale literature can be ordered by mail from Freescale Literature Distribution Centers (shown on the
back page of this publication) or through local sales offices. For U.S. and European literature orders, call
(800) 441-2447. Freescale publication Advanced Microcontroller Technical Literature (BR1116/D), includes
a complete listing of literature, sales offices, distributors, and an order form. Literature can also be ordered
on the web site at http://design-net.sps.mot.com/.
6.1.1 User’s Manual
52
MC68331UM/AD
MC68332UM/AD
MC68331 User’s Manual
MC68332 User’s Manual
Freescale Semiconductor, Inc.
$5000 =
Therefore, $40000 is on a 128 Kbyte boundary
6 SOURCES OF INFORMATION
For More Information On This Product,
$40000/$20000 = 2 = an integer
23 20 19 16 15 12 11 8 7
0000
Go to: www.freescale.com
128K = $20000
0101
1K = $400
0000
0000 0000 0000
4
3
0
M68331/332TUT/D
MC68331/332

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