mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 31

• Manufacturer Part Number: mc68336
• Description: An Introduction To The Mc68331 And Mc68332
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor, Inc.
4 SYSTEM INITIALIZATION
4.1 Configuring the Central Processing Unit
Initial stack pointer and program counter values are fetched from boot ROM. Other CPU resources that must
be initialized include the vector base register, the exception vector table, and the CPU status register.
4.1.1 Exceptions
An exception is a special condition, such as a reset, an interrupt, or an address error, that pre-empts normal
processing. When the processor recognizes an exception, it jumps to a special address and executes code
starting at that address until it reaches a return from exception (RTE) instruction. Then, it resumes execution
of the normal program code. The vectors in the exception vector table tell the processor the starting address
of each exception routine. The vector base register (VBR) determines the location of the vector table in
memory.
4.1.2 Vector Base Register
The vector base register is initialized to $000000 at reset, but the table can later be moved by changing the
value in the VBR. Changing the address of the table does not alter the vectors it contains. Use a MOVEC
instruction to access the VBR.
4.1.3 Exception Vector Table
The CPU32 recognizes 256 exception vector numbers. Each vector number corresponds to a space in the
exception vector table that is two words long. Thus, the table extends 1024 bytes upward in memory from
the base address. Each of the spaces in the table contains a 32-bit value that is used as an address pointer,
or vector. The actual address of each of the vectors in the table, referred to as the vector address, is four
times the vector number plus the vector base address.
Table 5 is an overview of the exception vector table. Refer to SECTION 6 EXCEPTION PROCESSING in
the CPU32 Reference Manual (CPU32RM/AD) for detailed discussion of exception processing and a com-
plete list of exception vectors.
The first two spaces (four words) in the exception vector table are used for initial stack pointer and program
counter values. These are referred to collectively as the reset vector, because the CPU32 loads the SP and
PC sequentially during reset exception processing. Unlike other vectors, the reset vector is mapped to su-
pervisor program space, to facilitate fetching the values. Because the VBR is initialized to $000000 during
reset, the reset vector is always located at address $000000.
All the other exception vectors occupy two words in the table, and are located in supervisor data space.
These vectors point to the beginning of software routines that handle particular exceptions. All the vectors
in the exception vector table must be initialized. The reset vector is generally fetched from external ROM.
Correct initial values for the stack pointer and program counter must be written to addresses $000000 to
$000006 in order for the system to begin program execution.
Following is an example of how the exception vector table works. Assume that the vector table base address
is the default value, $000000. An external device asserts IRQ7, and the CPU acknowledges the interrupt
service request. The external device must either provide a user vector number on the data bus and then
terminate the bus cycle by asserting DSACK, or it must assert AVEC and allow the processor to automati-
cally supply the level seven autovector number, which is 31. Assuming the external device asserts AVEC,
vector number 31 is automatically supplied to the CPU32. The CPU32 multiplies the vector number by four
to calculate the vector offset, then adds the vector offset to the contents of the VBR. The sum is the memory
address that contains the starting address of the exception routine. In this case, since VBR content is
$000000, the vector offset is 31 X 4 = 124 = $7C. The CPU reads address $7C and uses the 32-bit number
it contains as the starting address of the interrupt service routine.
MC68331/332
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