mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 38

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mc68336

Manufacturer Part Number
mc68336
Description
An Introduction To The Mc68331 And Mc68332
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4.4.2 Configuring the QSPI
The QSPI uses a synchronous serial bus to communicate with external peripherals and other MCUs. The
QSPI serial protocol is compatible with the serial peripheral interface (SPI) on the M68HC11 and M68HC05
families of MCUs. The module also has a queue, programmable queue pointers that allow up to 16 auto-
matic transfers, and a wrap-around mode that allows continuous transfers to and from the queue with no
CPU intervention. The queue is useful in applications such as control of an A/D converter. Remember the
following points when using the QSPI:
38
2. When using ICD32, set the serial communications protocol for the COM port being used, 9600 baud,
3. When using ICD32, enable the serial communications by typing: serialon
4. Load and run the program.
• Setting the SPE bit to enable the QSPI should be the last step in initialization.
• Data direction register DDRQS and port data register PORTQS must be initialized, even for pins that
• Peripheral chip-select signals are asserted when a command in command RAM is executed, but the
are assigned to the QSPI in pin assignment register PQSPAR.
assertion state (active high or active low) of the peripheral chip-select signal is determined by the value
of the appropriate bit in PORTQS.
B. Connect a DB-9 RS232 cable to connector J21. Connect J18 pin 13 (TXD) to J23 pin three. Con-
no parity, eight data bits, and one stop bit. For example, when using COM 2, type in the command:
serial 2 9600 n 8 1.
#SIZING_ON
INIT_SIM
INIT_SCI
PRINT
* The next two commands load the effective address of the last character
* of the message into address register A1.
* The next three commands check to see if the transmit data register is empty
* by looking at the TDRE bit in the SCI status register (SCSR). If the TDRE bit
* is zero, then there is data in register TDR that has not yet been sent to the
* transmit serial shifter. If the TDRE bit is one, then the transfer has
* occurred, and a new character may be written to register TDR. Thus, this
* sequence of code loops until the TDRE bit is one.
LOOP
FINISH
INT
MESSAGE
nect J18 pin 14 (RXD) to J23 pin 1. Keep W20 at the factory setting of DCE.
INCLUDE
INCLUDE
INCLUDE
ORG
MOVE.B #$7F,SYNCR
CLR.B
MOVE.W #$0037,SCCR0
MOVE.W #$000C,SCCR1
LEA MESSAGE,A0
MOVE.L A0,A1
ADDA.L #$5,A1
MOVE.W
ANDI.W #$0100,D0
BEQ LOOP
MOVE.B (A0)+,D0
MOVE.W D0,SCDR
CMPA.L A1,A0
BNE LOOP
BRA FINISH
RTE
FCB '12345'
SYPCR
SCSR,D0
Freescale Semiconductor, Inc.
'equ332.asm'
'init_res.asm';include reset vector
'init_int.asm';include interrupt vectors
$400
For More Information On This Product,
Go to: www.freescale.com
;equates (for MC68331, choose ‘equ331.asm’)
;begin program at $400, immediately after
;the exception table
;increase clock speed
;disable software watchdog
;set the SCI baud rate to 9600
;enable the receiver and transmitter
;load the effective address of the message
;to be printed into address register A0.
;move the current letter of the message
;into D0. Then, increment A0 to point to
;the next letter
;transfer the current letter to SCDR
;check to see if at the end of the message
;if not, print another character
;stay here when done
;unused interrupts point here
;“12345” will be printed
M68331/332TUT/D
MC68331/332

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